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BulkLoop例程の初始化函数and重复调度函数の解析

//-----------------------------------------------------------------------------

// File: bulkloop.c

// Contents: Hooks required to implement USB peripheral function.

//

// $Archive: /USB/Examples/FX2LP/bulkloop/bulkloop.c $

// $Date: 3/23/05 2:55p $

// $Revision: 4 $

//

//

//-----------------------------------------------------------------------------

// Copyright 2003, Cypress Semiconductor Corporation

//-----------------------------------------------------------------------------

#pragma NOIV // Do not generate interrupt vectors

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#include "fx2.h" // Contents: EZ-USB FX2/FX2LP/FX1 constants, macros, datatypes, globals, and library function prototypes.

#include "fx2regs.h" // Contents: EZ-USB FX2/FX2LP/FX1 register declarations and bit mask(给寄存器赋值时常用到的bm开头的常量,如后文中的bmCLKSPD definitions.

#include "syncdly.h" // SYNCDELAY macro 同步延时宏,部分寄存器操作之间需要一定的延时,参考TRM 15.14

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extern BOOL GotSUD; // Received setup data flag

extern BOOL Sleep;

extern BOOL Rwuen;

extern BOOL Selfpwr;

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BYTE Configuration; // Current configuration

BYTE AlternateSetting; // Alternate settings

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#define VR_NAKALL_ON 0xD0

#define VR_NAKALL_OFF 0xD1

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//-----------------------------------------------------------------------------

// Task Dispatcher hooks

// The following hooks are called by the task dispatcher.

//-----------------------------------------------------------------------------

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void TD_Init(void) // Called once at startup 初始化函数

{

// set the CPU clock to 48MHz

CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;

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// set the slave FIFO interface to 48MHz

IFCONFIG |= 0x40; //详见TRM 221

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// Registers which require a synchronization delay, see TRM section 15.14

// FIFORESET FIFOPINPOLAR

// INPKTEND OUTPKTEND

// EPxBCH:L REVCTL

// GPIFTCB3 GPIFTCB2

// GPIFTCB1 GPIFTCB0

// EPxFIFOPFH:L EPxAUTOINLENH:L

// EPxFIFOCFG EPxGPIFFLGSEL

// PINFLAGSxx EPxFIFOIRQ

// EPxFIFOIE GPIFIRQ

// GPIFIE GPIFADRH:L

// UDMACRCH:L EPxGPIFTRIG

// GPIFTRIG

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// Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...

// ...these have been replaced by GPIFTC[B3:B0] registers

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// default: all endpoints have their VALID bit set

// default: TYPE1 = 1 and TYPE0 = 0 --> BULK

// default: EP2 and EP4 DIR bits are 0 (OUT direction)

// default: EP6 and EP8 DIR bits are 1 (IN direction)

// default: EP2, EP4, EP6, and EP8 are double buffered

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// we are just using the default values, yes this is not necessary... 这些端点的初始化内容,如果和端点描述符中的不相符怎么办?

EP1OUTCFG = 0xA0; //activatedbulk

EP1INCFG = 0xA0; // activatedbulk

SYNCDELAY; // see TRM section 15.14

EP2CFG = 0xA2; //OUTbulk512double

SYNCDELAY;

EP4CFG = 0xA0; //OUTbulk

SYNCDELAY;

EP6CFG = 0xE2; //INbulk512double

SYNCDELAY;

EP8CFG = 0xE0; //INbulk

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// out endpoints do not come up armed

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// since the defaults are double buffered we must write dummy byte counts twice

SYNCDELAY;

EP2BCL = 0x80; // arm EP2OUT by writing byte count w/skip. 此处的0x80是任意值、无意义值,只是起到arm ep的作用。

SYNCDELAY;

EP2BCL = 0x80;

SYNCDELAY;

EP4BCL = 0x80; // arm EP4OUT by writing byte count w/skip.

SYNCDELAY;

EP4BCL = 0x80;

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// enable dual autopointer feature 启用自动指针

AUTOPTRSETUP |= 0x01;

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}

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void TD_Poll(void) // Called repeatedly while the device is idle 重复调度函数

{

WORD i;

WORD count;

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if(!(EP2468STAT & bmEP2EMPTY)) //如果EP2‘s Buffer is full.

{ // check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set‘s this bit when FIFO is empty

if(!(EP2468STAT & bmEP6FULL)) //如果EP6‘s Buffer is empty.

{ // check EP6 FULL(busy) bit in EP2468STAT (SFR), core set‘s this bit when FIFO is full

APTR1H = MSB( &EP2FIFOBUF ); //自动指针1H -> EP2‘s Buffer 地址的高8位?这里有疑问诶,希望看到的高人能给解答一下~

APTR1L = LSB( &EP2FIFOBUF ); //自动指针1L -> EP2‘s Buffer地址的低8位?

//APT1H 定义同理与AUTOPTR1HAUTOPTRH1APT1L 定义同理与AUTOPTR1LAUTOPTRL1;兼容老版本的例程;在fx2regs.h定义;

AUTOPTRH2 = MSB( &EP6FIFOBUF );

AUTOPTRL2 = LSB( &EP6FIFOBUF );

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count = (EP2BCH << 8) + EP2BCL; //EP2BUF中总共的字节数

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// loop EP2OUT buffer data to EP6IN

for( i = 0x0000; i < count; i++ )

{

// setup to transfer EP2OUT buffer to EP6IN buffer using AUTOPOINTER(s) //每被访问一次,自动指针都会增加地址

EXTAUTODAT2 = EXTAUTODAT1;

}

EP6BCH = EP2BCH;

SYNCDELAY;

EP6BCL = EP2BCL; // arm EP6IN

SYNCDELAY;

EP2BCL = 0x80; // re(arm) EP2OUT

}

}

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if(!(EP2468STAT & bmEP4EMPTY))

{ // check EP4 EMPTY(busy) bit in EP2468STAT (SFR), core set‘s this bit when FIFO is empty

if(!(EP2468STAT & bmEP8FULL))

{ // check EP8 FULL(busy) bit in EP2468STAT (SFR), core set‘s this bit when FIFO is full

APTR1H = MSB( &EP4FIFOBUF );

APTR1L = LSB( &EP4FIFOBUF );

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AUTOPTRH2 = MSB( &EP8FIFOBUF );

AUTOPTRL2 = LSB( &EP8FIFOBUF );

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count = (EP4BCH << 8) + EP4BCL;

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// loop EP4OUT buffer data to EP8IN

for( i = 0x0000; i < count; i++ )

{

// setup to transfer EP4OUT buffer to EP8IN buffer using AUTOPOINTER(s)

EXTAUTODAT2 = EXTAUTODAT1;

}

EP8BCH = EP4BCH;

SYNCDELAY;

EP8BCL = EP4BCL; // arm EP8IN

SYNCDELAY;

EP4BCL = 0x80; // re(arm) EP4OUT

}

}

}

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BOOL TD_Suspend(void) // Called before the device goes into suspend mode

{

return(TRUE);

}

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BOOL TD_Resume(void) // Called after the device resumes

{

return(TRUE);

}

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//-----------------------------------------------------------------------------

// Device Request hooks 设备请求函数

// The following hooks are called by the end point 0 device request parser.

//-----------------------------------------------------------------------------

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BOOL DR_GetDescriptor(void)

{

return(TRUE);

}

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BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received

{

Configuration = SETUPDAT[2];

return(TRUE); // Handled by user code

}

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BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received

{

EP0BUF[0] = Configuration;

EP0BCH = 0;

EP0BCL = 1;

return(TRUE); // Handled by user code

}

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BOOL DR_SetInterface(void) // Called when a Set Interface command is received

{

AlternateSetting = SETUPDAT[2];

return(TRUE); // Handled by user code

}

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BOOL DR_GetInterface(void) // Called when a Set Interface command is received

{

EP0BUF[0] = AlternateSetting;

EP0BCH = 0;

EP0BCL = 1;

return(TRUE); // Handled by user code

}

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BOOL DR_GetStatus(void)

{

return(TRUE);

}

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BOOL DR_ClearFeature(void)

{

return(TRUE);

}

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BOOL DR_SetFeature(void)

{

return(TRUE);

}

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BOOL DR_VendorCmnd(void)

{

BYTE tmp;

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switch (SETUPDAT[1])

{

case VR_NAKALL_ON:

tmp = FIFORESET;

tmp |= bmNAKALL;

SYNCDELAY;

FIFORESET = tmp;

break;

case VR_NAKALL_OFF:

tmp = FIFORESET;

tmp &= ~bmNAKALL;

SYNCDELAY;

FIFORESET = tmp;

break;

default:

return(TRUE);

}

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return(FALSE);

}

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//-----------------------------------------------------------------------------

// USB Interrupt Handlers USB中断函数

// The following functions are called by the USB interrupt jump table.

//-----------------------------------------------------------------------------

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// Setup Data Available Interrupt Handler

void ISR_Sudav(void) interrupt 0

{

GotSUD = TRUE; // Set flag

EZUSB_IRQ_CLEAR();

USBIRQ = bmSUDAV; // Clear SUDAV IRQ

}

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// Setup Token Interrupt Handler

void ISR_Sutok(void) interrupt 0

{

EZUSB_IRQ_CLEAR();

USBIRQ = bmSUTOK; // Clear SUTOK IRQ

}

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void ISR_Sof(void) interrupt 0

{

EZUSB_IRQ_CLEAR();

USBIRQ = bmSOF; // Clear SOF IRQ

}

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void ISR_Ures(void) interrupt 0 //这个函数不理解

{

// whenever we get a USB reset, we should revert to full speed mode

pConfigDscr = pFullSpeedConfigDscr;

((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;

pOtherConfigDscr = pHighSpeedConfigDscr;

((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;

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EZUSB_IRQ_CLEAR();

USBIRQ = bmURES; // Clear URES IRQ

}

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void ISR_Susp(void) interrupt 0

{

Sleep = TRUE;

EZUSB_IRQ_CLEAR();

USBIRQ = bmSUSP;

}

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void ISR_Highspeed(void) interrupt 0

{

if (EZUSB_HIGHSPEED())

{

pConfigDscr = pHighSpeedConfigDscr;

((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;

pOtherConfigDscr = pFullSpeedConfigDscr;

((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;

}

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EZUSB_IRQ_CLEAR();

USBIRQ = bmHSGRANT;

}

void ISR_Ep0ack(void) interrupt 0

{

}

void ISR_Stub(void) interrupt 0

{

}

void ISR_Ep0in(void) interrupt 0

{

}

void ISR_Ep0out(void) interrupt 0

{

}

void ISR_Ep1in(void) interrupt 0

{

}

void ISR_Ep1out(void) interrupt 0

{

}

void ISR_Ep2inout(void) interrupt 0

{

}

void ISR_Ep4inout(void) interrupt 0

{

}

void ISR_Ep6inout(void) interrupt 0

{

}

void ISR_Ep8inout(void) interrupt 0

{

}

void ISR_Ibn(void) interrupt 0

{

}

void ISR_Ep0pingnak(void) interrupt 0

{

}

void ISR_Ep1pingnak(void) interrupt 0

{

}

void ISR_Ep2pingnak(void) interrupt 0

{

}

void ISR_Ep4pingnak(void) interrupt 0

{

}

void ISR_Ep6pingnak(void) interrupt 0

{

}

void ISR_Ep8pingnak(void) interrupt 0

{

}

void ISR_Errorlimit(void) interrupt 0

{

}

void ISR_Ep2piderror(void) interrupt 0

{

}

void ISR_Ep4piderror(void) interrupt 0

{

}

void ISR_Ep6piderror(void) interrupt 0

{

}

void ISR_Ep8piderror(void) interrupt 0

{

}

void ISR_Ep2pflag(void) interrupt 0

{

}

void ISR_Ep4pflag(void) interrupt 0

{

}

void ISR_Ep6pflag(void) interrupt 0

{

}

void ISR_Ep8pflag(void) interrupt 0

{

}

void ISR_Ep2eflag(void) interrupt 0

{

}

void ISR_Ep4eflag(void) interrupt 0

{

}

void ISR_Ep6eflag(void) interrupt 0

{

}

void ISR_Ep8eflag(void) interrupt 0

{

}

void ISR_Ep2fflag(void) interrupt 0

{

}

void ISR_Ep4fflag(void) interrupt 0

{

}

void ISR_Ep6fflag(void) interrupt 0

{

}

void ISR_Ep8fflag(void) interrupt 0

{

}

void ISR_GpifComplete(void) interrupt 0

{

}

void ISR_GpifWaveform(void) interrupt 0

{

}