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ARM Compiler toolchain Compiler -- Supported ARM architectures
--cpu=name
This option enables code generation for the selected ARM processor or architecture.
Syntax
--cpu=name
Where:
name
is the name of a processor or architecture.
If
is the name of a processor, enter it as shown on ARM data sheets, for example,name
ARM7TDMI
,ARM1176JZ-S
,MPCore
.If
is the name of an architecture, it must belong to the list of architectures shown in Table 3.name
Processor and architecture names are not case-sensitive.
Wildcard characters are not accepted.
Supported ARM architectures
Architecture Name Description Example processors 4
ARMv4 without Thumb SA-1100 4T
ARMv4 with Thumb ARM7TDMI, ARM9TDMI, ARM720T, ARM740T, ARM920T, ARM922T, ARM940T, SC100 5T
ARMv5 with Thumb and interworking 5TE
ARMv5 with Thumb, interworking, DSP multiply, and double-word instructions ARM9E, ARM946E-S, ARM966E-S 5TEJ
ARMv5 with Thumb, interworking, DSP multiply, double-word instructions, and Jazelle®extensions[a] ARM926EJ-S, ARM1026EJ-S, SC200 6
ARMv6 with Thumb, interworking, DSP multiply, double-word instructions, unaligned and mixed-endian support, Jazelle, and media extensions ARM1136J-S, ARM1136JF-S 6-M
ARMv6 micro-controller profile with Thumb only plus processor state instructions Cortex-M1 without OS extensions, Cortex-M0, SC000 6S-M
ARMv6 micro-controller profile with Thumb only, plus processor state instructions and OS extensions Cortex-M1 with OS extensions 6K
ARMv6 with SMP extensions MPCore 6T2
ARMv6 with Thumb-2 ARM1156T2-S, ARM1156T2F-S 6Z
ARMv6 with Security Extensions ARM1176JZF-S, ARM1176JZ-S 7
ARMv7 with Thumb-2 only and without hardware divide Cortex-A5 7-A
ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb-2, and Thumb-2EE instruction sets, DSP support, and 32-bit SIMD support Cortex-A8, Cortex-A9 7-A.security
Enables the use of the SMC
instruction (formerlySMI
) when assembling for the v7-A architectureCortex-A5, Cortex-A8, Cortex-A9 7-R
ARMv7 real-time profile with ARM, Thumb-2, DSP support, and 32-bit SIMD support Cortex-R4, Cortex-R4F 7-M
ARMv7 micro-controller profile with Thumb-2 only and hardware divide Cortex-M3, SC300 7E-M
ARMv7-M enhanced with DSP (saturating and 32-bit SIMD) instructions Cortex-M4 [a] The ARM compiler cannot generate Java bytecodes.
Note
ARMv7 is not an actual ARM architecture.
--cpu=7
denotes the features that are common to all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures.
By definition, any given feature used with --cpu=7
exists on all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures.
7-A.security
is not an actual ARM architecture, but rather, refers to 7-A
plus Security Extensions.
Default
If you do not specify a --cpu
option, the compiler assumes --cpu=ARM7TDMI
.
To obtain a full list of CPU architectures and processors, use the --cpu=list
option.
Usage
The following general points apply to processor and architecture options:
- Processors
Selecting the processor selects the appropriate architecture,Floating-Point Unit (FPU), and memory organization.
The supported
--cpu
values include all current ARM product names or architecture versions.Other ARM architecture-based processors, such as the Marvell Feroceon and the Marvell XScale, are also supported.
If you specify a processor for the
--cpu
option, the compiled code is optimized for that processor.
This enables the compiler to use specific coprocessors or instruction scheduling for optimum performance.
- Architectures
If you specify an architecture name for the
--cpu
option, the code is compiled to run on any processor supporting that architecture.
For example,--cpu=5TE
produces code that can be used by theARM926EJ-S®.
- FPU
Some specifications of
--cpu
imply an--fpu
selection.
For example, when compiling with the--arm
option,--cpu=ARM1136JF-S
implies--fpu=vfpv2
.
Similarly,--cpu=Cortex-R4F
implies--fpu=vfpv3_d16
.Note
Any explicit FPU, set with
--fpu
on the command line, overrides an implicit FPU.If no
--fpu
option is specified and no--cpu
option is specified,--fpu=softvfp
is used.
- ARM/Thumb
Specifying a processor or architecture that supports Thumb instructions,
such as--cpu=ARM7TDMI
, does not make the compiler generate Thumb code.
It only enables features of the processor to be used, such as long multiply.
Use the--thumb
option to generate Thumb code, unless the processor is a Thumb-only processor, for example Cortex-M4.
In this case,--thumb
is not required.Note
Specifying the target processor or architecture might make the object code generated
by the compiler incompatible with other ARM processors.
For example, code compiled for architecture ARMv6 might not run on an ARM920T processor,
if the compiled code includes instructions specific to ARMv6.
Therefore, you must choose the lowest common denominator processor suited to your purpose.If you are compiling code that is intended for mixed ARM/Thumb systems for processors that support ARMv4T or ARMv5T,
then you must specify the interworking option--apcs=/interwork
.
By default, this is enabled for processors that support ARMv5T or above.If you compile for Thumb, that is with the
--thumb
option on the command line,
the compiler compiles as much of the code as possible using the Thumb instruction set.
However, the compiler might generate ARM code for some parts of the compilation.
For example, if you are compiling code for a Thumb-1 processor and using VFP,
any function containing floating-point operations is compiled for ARM.If the architecture you are compiling code for only supports Thumb, there is no need to specify
--thumb
on the command line.
For example, if compiling code for ARMv7-M with--cpu=7-M
, you do not have to specify--thumb
on the command line,
because ARMv7-M only supports Thumb-2.
Similarly, ARMv6-M and other Thumb-only architectures.
Restrictions
You cannot specify both a processor and an architecture on the same command-line.
--fpu=name
name
This option enables you to specify the target FPU architecture.
If you specify this option, it overrides any implicit FPU option that appears on the command line, for example, where you use the --cpu
option.
To obtain a full list of FPU architectures use the --fpu=list
option.
Syntax
--fpu=name
Where name
is one of:
none
Selects no floating-point option. No floating-point code is to be used. This produces an error if your code contains float types.
vfpv
This is a synonym for
vfpv2
.vfpv2
Selects a hardware vector floating-point unit conforming to architecture VFPv2.
Note
If you enter
armcc --thumb --fpu=vfpv2
on the command line,
the compiler compiles as much of the code using the Thumb instruction set as possible,
but hard floating-point sensitive functions are compiled to ARM code.
In this case, the value of the predefine__thumb
is not correct.vfpv3
Selects a hardware vector floating-point unit conforming to architecture VFPv3.
VFPv3 is backwards compatible with VFPv2 except that VFPv3 cannot trap floating-point exceptions.vfpv3_fp16
Selects a hardware vector floating-point unit conforming to architecture VFPv3
that also provides the half-precision extensions.vfpv3_d16
Selects a hardware vector floating-point unit conforming to VFPv3-D16 architecture.
vfpv3_d16_fp16
Selects a hardware vector floating-point unit conforming to VFPv3-D16 architecture,
that also provides the half-precision extensions.vfpv4
Selects a hardware floating-point unit conforming to FPv4 architecture.
vfpv4_d16
Selects a hardware floating-point unit conforming to the VFPv4-D16 architecture.
fpv4-sp
Selects a hardware floating-point unit conforming to the single precision variant of the FPv4 architecture.
softvfp
Selects software floating-point support where floating-point operations are performed by a floating-point library,
fplib
.
This is the default if you do not specify a--fpu
option, or if you select a CPU that does not have an FPU.softvfp+vfpv2
Selects a hardware vector floating-point unit conforming to VFPv2, with software floating-point linkage.
Select this option if you are interworking Thumb code with ARM code on a system that implements a VFP unit.If you select this option:
Compiling with
--thumb
behaves in a similar way to--fpu=softvfp
except that it links with floating-point libraries that use VFP instructions.Compiling with
--arm
behaves in a similar way to--fpu=vfpv2
except that all functions are given software floating-point linkage.
This means that functions pass and return floating-point arguments and
results in the same way as--fpu=softvfp
, but use VFP instructions internally.
Note
If you specify
softvfp+vfpv2
with the--arm
or--thumb
option for C code,
it ensures that your interworking floating-point code is compiled to use software floating-point linkage.softvfp+vfpv3
Selects a hardware vector floating-point unit conforming to VFPv3, with software floating-point linkage.
Select this option if you are interworking Thumb code with ARM code on a system that implements a VFPv3 unit.softvfp+vfpv3_fp16
Selects a hardware vector floating-point unit conforming to VFPv3-fp16, with software floating-point linkage.
softvfp+vfpv3_d16
Selects a hardware vector floating-point unit conforming to VFPv3-D16, with software floating-point linkage.
softvfp+vfpv3_d16_fp16
Selects a hardware vector floating-point unit conforming to
vfpv3_d16_fp16
, with software floating-point linkage.softvfp+vfpv4
Selects a hardware floating-point unit conforming to FPv4, with software floating-point linkage.
softvfp+vfpv4_d16
Selects a hardware floating-point unit conforming to VFPv4-D16, with software floating-point linkage.
softvfp+fpv4-sp
Selects a hardware floating-point unit conforming to FPv4-SP, with software floating-point linkage.
Usage
Any FPU explicitly selected using the --fpu
option always overrides any FPU implicitly selected using the --cpu
option.
For example, the option --cpu=ARM1136JF-S --fpu=softvfp
generates code that uses the software floating-point library fplib
,
even though the choice of CPU implies the use of architecture VFPv2.
To control floating-point linkage without affecting the choice of FPU, you can use --apcs=/softfp
or --apcs=/hardfp
.
Restrictions
The compiler only permits hardware VFP architectures (for example, --fpu=vfpv3
, --fpu=softvfp+vfpv2
),
to be specified when MRRC
and MCRR
instructions are supported in the processor instruction set. MRRC
and MCRR
instructions are not supported in 4, 4T, 5T and 6-M.
Therefore, the compiler does not allow the use of these CPU architectures with hardware VFP architectures.
Other than this, the compiler does not check that --cpu
and --fpu
combinations are valid.
Beyond the scope of the compiler, additional architectural constraints apply.
For example, VFPv3 is not supported with architectures prior to ARMv7.
Therefore, the combination of --fpu
and --cpu
options permitted by the compiler does not necessarily translate to the actual device in use.
The compiler only generates scalar floating-point operations.
If you want to use VFP vector operations, you must do this using assembly code.
NEON support is disabled for softvfp
.
Default
The default target FPU architecture is derived from use of the --cpu
option.
If the CPU specified with --cpu
has a VFP coprocessor, the default target FPU architecture is the VFP architecture for that CPU.
For example, the option --cpu ARM1136JF-S
implies the option --fpu vfpv2
.
If a VFP coprocessor is present, VFP instructions are generated.
If you are building ARM Linux applications with --arm_linux
or --arm_linux_paths
,
the default is always software floating-point linkage.
Even if you specify a CPU that implies an FPU (for example, --cpu=ARM1136JF-S
),
the compiler still defaults to --fpu=softvfp+vfp
, not --fpu=vfp
.
If there is no VFP coprocessor, the compiler generates code
that makes calls to the software floating-point library fplib
to carry out floating-point operations.
ARM Compiler toolchain Compiler -- Supported ARM architectures