首页 > 代码库 > 关于开发语音编译器的过程

关于开发语音编译器的过程

     

      对于厂家制造的特定规则的语音IC, 都需要为之开发相对应的语音编译器来满足需求,主要差别就是MCU处理器对于数据的访问形式不同而导致(也就是mcu本身所设计的指令和硬件不同),那么就需要编译一个对应的语音文件让此IC去识别执行。

     再说开发语音编译器软件流程之前,先谈谈我们此次用到的MCU(GA452SP16)微型处理器的一些信息;A452SP16是一个具有低功耗和高速CMOS工艺的8位微处理器。它的操作核心由RISC类体系结构实现。采用16位精简指令(58条指令 – 大多数指令执行时间为单个指令周期)集并拥有高达224字节的RAM, 程序可方便的访问控制器内部的4096 * 16 bits ROM空间、65536*8bits speech ROM 空间及RAM空间而不需要执行繁琐的换页功能。采用特殊功能寄存器与RAM统一寻址的方式。16级堆栈(CALL or PUSH),使用32 * 8bit RAM(256 * 8bit中的高32位)。

     那么我们到底该如何开发一个语音编译器呢?至于做成什么样子,我暂且不说,每个人有每个人的审美观,但是一定要人性化,毕竟以后是人要去用它。我只说说核心东西,首先一定要读懂规则(Specification),规则很重要,什么规则呢,mcu处理器所需要的规则,还是很模糊对吧。其实以我理解就是:对存储空间特定地址里面的数据进行特定的设置,因为我设计电路就这样设计的,按键下去,我只能跳转到0x001c地址执行存放 的0011数据,它的灯就亮了,或者其他的什么功能,我觉得就是这样,这就是所谓的规则,如果你不按照它的规则来,那么编译出来的.bin文件你即使烧进去,它也不会是你想要的效果。第二点就是对语音数据的编码,毕竟是语音IC嘛,这就是对数据的处理,编码这块是重点,也是难点,以前在博客里有发过语音数据的解析分析代码,先弄懂那个,在谈编码,我们此次是将8bits的语音数据编码成4bits和5bits的混合编码,至于编码算法,将在以后发布,第三点就是根据规则获取地址,设置数据,在这时,就是锻炼你的思维逻辑了,对数据进行构造,以及数据与数据之间的联系;举个例子:

0x107A

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

-

-

-

-

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

S3

S2

S1

S0

       Bit7-6      :S3, security setting of addressing space 0x0C00~0x0FFF

                       01              : serurity off

                       otherwise    : serurity on

       Bit5-4      :S2, security setting of addressing space 0x0800~0x0BFF

                       01              : serurity off

                       otherwise    : serurity on

       Bit3-2      :S1, security setting of addressing space 0x0400~0x07FF

                       01              : serurity off

                       otherwise    : serurity on

       Bit1-0      :S0, security setting of addressing space 0x0000~0x03FF

                       01              : serurity off

                       otherwise    : serurity on

      

      

0x107C

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

LDO_WK

LDO_STB

LDO_RD[4:0]

LDO_RU[2]

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

LDO_RU[1]

LDO_RU[0]

LDO_OP

 

1

OTP_AT[2:0]

       Bit15       :LDO_WK, LDO enable / disable when MCU operating.

                       0         : Disable

                       1         : Enable

       Bit14       :LDO_STB, LDO enable / disable when MCU standby.

                       0         : Disable

                       1         : Enable

       Bit13-9    :LDO_RD, LDO resistor RD selection

                       The corresponding resistors are 320K, 160K, 80K, 40K and 20K.

         0         : select the resistor

         1         : bypass the resistor

       Bit8-6      :LDO_RU, LDO resistor RU selection

                       The corresponding resistors are 60K, 30K and 15K.

         0         : bypass the resistor

         1         : select the resistor

       Bit5         :LDO_OP, LDO / OP selection

                       0         : LDO

                       1         : OP

   

 

       Bit2-0      :OTP_AT, OTP Access Time Setting

                       000     : PCE Time = 2 * Tosc

                       001     : PCE Time = Tosc + 4ns

                       010     : PCE Time = Tosc + 24ns

                       011      : PCE Time = 36ns

                       100     : PCE Time = 48ns

                       101     : PCE Time = 60ns

                       110      : PCE Time = 72ns

                       111      : PCE Time = 72ns, PEN Gating On

                     Note:

                            Fosc > 21MHZ,     OTP_AT=000

                            Fosc < 21MHZ,     OTP_AT=010

                            Fosc < 15MHZ,     OTP_AT=001

                            Fosc < 7MHZ,              OTP_AT=110

                            Fosc < 500KHZ,    OTP_AT=111

                            OTP_AT=011 ~ 101, need Testing.

      

0x107D

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

RC_LS

RC_CX2

RC_RSEL[8:3]

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

RC_RSEL[2:0]

1

RC_HS

1

1

1

              Bit3, Bit15: RC-OSC high / low speed selection

                      1x  : High Speed, Bit14-Bit15 for RSEL[-1], RSEL[-2]

00    : Medium Speed

01    : Low speed

              Bit14       : RC_CX2, 1X / 2X capacitor selection

                      0           : 1X capacitor

                      1           : 2X capacitor  

              Bit13-5    : RC_RSEL, internal resistor selection

                    

Bit8

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Bit-1

Bit-2

105K

53K

27K

14K

7.5K

4K

2K

1K

0.5K

250

125

                    

                                            Note. Bit-1, Bit-2 used when RC_HS=1

 

0x107E

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

MTP_DEP[1:0]

MTP_SEC[2:0]

1

1

1

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

1

1

1

1

OPT_OPRTY

OPT_EPRTY

       Bit15-14  : MTP_DEP, program memory depth

                            11 : 8K

                            10 : 4K

                            01 : 2K

                            00 : 1K

       Bit13-11  : MTP_SEC, program memory location

 

 

MTP_DEP =1K

MTP_DEP =2K

MTP_DEP =4K

MTP_DEP =8K

MTP_SEC =111

0000 ~

03FF

0000 ~

07FF

0000 ~

0FFF

0000 ~

1FFF

MTP_SEC =110

0400 ~

07FF

0800 ~

0FFF

1000 ~

1FFF

0000 ~

1FFF

MTP_SEC =100

0800 ~

0BFF

1000 ~

17FF

1000 ~

1FFF

0000 ~

1FFF

MTP_SEC =000

0C00 ~

0FFF

1800 ~

1FFF

1000 ~

1FFF

0000 ~

1FFF

 

 

 

 

 

 

 

 

 

                           

                             *Unsupported in 4K OTP body marked in green

Bit3-2      :OPT_OPRTY, odd parity of @107C~@107F

       Bit1-0      :OPT_EPRTY, even parity of @107C~@107F

 


0x107F

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

-

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

DIV4

OST_SEL

1

DIV8

IO_AUTO

EPOR_OPT

       Bit15-14  : reserved

       Bit13       :XT_EN, XT-OSC enable / disable

                      0           :Disable

                      1           :Enable

              Bit12       : ENWDT, Watch dog timer Enable / Disable

                      0           :Disable

                      1           :Enable

       Bit11-10  :

                     When XT_EN, XT_DRV, XT-OSCdriver size selection

                           00           : internal driver off

     01           :small drive (1X)

     10           :medium drive (2X)

     11           :large drive (3X)

                            When RC_EN, RCCKO, clock out fromP64.

                            00           : No clock out.

     01           :Fosc / 2

     10           :Fosc / 4

     11           :Fosc / 8

       Bit9         :HLF, XT-OSC high / low frequency selection

0           : Low frequency

                      1           :High frequency

              Bit8         : RC_EN, RC-OSC Enable / Disable

                      0           :Disable

                      1           :Enable

              Bit2, Bit7 :{DIV8, DIV4}, instruction cycle

                             00         :Fsys = Fosc / 2, 2 OSC cycles per instruction cycle.

                             01         :Fsys = Fosc / 4, 4 OSC cycles per instruction cycle

                             10         :Fsys = Fosc / 8, 8 OSC cycles per instruction cycle

       Bit6-4      :OST_SEL, OSC startup time-out selection

                      000       :4.5ms

                      001       :9.0ms

                      010       :18ms

                      011              :36ms

                      100       :250us    (for RC-OSC)

                      101       :288ms

                      110              :576ms

                      111        :600us    (for RC-OSC)

              Bit1         :IO_AUTO, GIO pull-high / pull-down automatically switch off when                                               GIOdirection set to output.

                      0           :Disable

                      1           :Enable         

              Bit0         :EPOR_OPT, P63 / EPOR_N selection.

                      0           :P63(default)

                      1           :EPOR_N

 

 

Notes about options setting:

 

  1. MCU clock source, andoscillator mode.
    1. XTH  : High speed crystal (>1Mhz)

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

-

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

-

1

-

01, 10, 11

1

0

  1. XTL  : Low speed crystal ( < 1Mhz)

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

-

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

-

1

-

00

0

0

  1. IRC   : Internal RC mode

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

-

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

-

0

-

00

-

1

 

  1. IRC+CKO        : Internal RC mode and output clock from OSCO

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

0

-

01, 10, 11

0

1

  1. IRC+XTL         : Internal RC mode and Enable Low speed crystal

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

1

-

00

0

1

  1. XCK  : External clock source on OSCO.

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

XT_EN

ENWDT

XT_DRV[1:0]

HLF

RC_EN

RCCKO[1:0]

0

-

00

0

0

 

  1. MCU Core power sourceselection
    1. VDD : LDO/OP are all disabled

Bit15

Bit14

Bit13-9

Bit8-6

Bit5

LDO_WK

LDO_STB

LDO_RD[4:0]

LDO_RU[2:0]

LDO_OP

0

0

-

-

0

  1. LDO : Core power source fromLDO output, set LDO_RD & LDO_RU to adjust the output level.

Bit15

Bit14

Bit13-9

Bit8-6

Bit5

LDO_WK

LDO_STB

LDO_RD[4:0]

LDO_RU[2:0]

LDO_OP

1

1

00000~11111

000~111

0

 

  1. OP     : Core power source from LDO output and set the LDO operate likean OP, set LDO_RD & LDO_RU to adjust the output level.

Bit15

Bit14

Bit13-9

Bit8-6

Bit5

LDO_WK

LDO_STB

LDO_RD[4:0]

LDO_RU[2:0]

LDO_OP

1

1

00000~11111

000~111

1

 

 

  1. Port input buffer read-back

          P64: XT-OSC enable, read-back = 1

                 XT-OSC disable, read-back = pinlevel;

 

          P65: XT-OSC enable, read-back = 1

                 XRC-OSC enable, read-back = 1

                 Otherwise, read-back = pinlevel;

 

  1. IRC-OSC frequency rangeestimation
    1. 20Mhz  > Fosc >  3Mhz

Bit15

Bit14

Bit13-5

RC_LS

RC_CX2

RC_RSEL[8:0]

0

0

0x01F~0x1FF

 

 

 

 

  1. 3Mhz  > Fosc >  750Khz

Bit15

Bit14

Bit13-5

RC_LS

RC_CX2

RC_RSEL[8:0]

0

1

0x01F~0x1FF

 

 

 

 

  1. 1.5Mhz  > Fosc >  500Khz

Bit15

Bit14

Bit13-5

RC_LS

RC_CX2

RC_RSEL[8:0]

1

0

0x01F~0x1FF

 

 

 

 

  1. 500Khz  > Fosc >  150Khz

Bit15

Bit14

Bit13-5

RC_LS

RC_CX2

RC_RSEL[8:0]

1

1

0x01F~0x1FF

 

 

 

 

 

  • Special code 5: SEL_TAB, select decoding table.

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

TAB_S[3:0]

0

0

0

0

 Bit7-4     : TAB_S [3:0]

TAB_S[3:0]

Table selected

0100:0x40

TAB40 (Map-table 0xC0-0xCF)

0101:0x50

TAB41(Map-table 0xD0-0xDF)

0110:0x60

TAB42(Map-table 0xE0-0xEF)

0111:0x70

TAB43(Map-table 0xF0-0xFF)

1000:0x80

TAB50

1001:0x90

TAB51

1010:0xA0

TAB52

1011:0xB0

TAB53

1100:0xC0

TAB54

1101:0xD0

TAB55

1110:0xE0

TAB56

1111:0xF0

TAB57

关于开发语音编译器的过程