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MIPI D-PHY 简写收集


Acronyms


APPI         Abstracted PHY-Protocol Interface
BER            Bit Error Rate

417 CIL
Control and Interface Logic


418 DDR
Double Data Rate


419 EMI Electro Magnetic Interference


420 EoT End of Transmission


421 HS

High-Speed; identifier for operation mode


422 HS-RX

High-Speed Receiver (Low-Swing Differential)


423 HS-TX

High-Speed Transmitter (Low-Swing Differential)


424 IO

Input-Output

425 ISTO

Industry Standards and Technology Organization


426 LP

Low-Power: identifier for operation mode


427 LP-CD

Low-Power Contention Detector


428 LPDT

Low-Power Data Transmission


429 LP-RX

Low-Power Receiver (Large-Swing Single-Ended)


430 LP-TX

Low-Power Transmitter (Large-Swing Single-Ended)


431 LPS

Low-Power State(s)


432 LSB

Least Significant Bit


433 Mbps

Megabits per second


434 MIPI

Mobile Industry Processor Interface


435 MSB

Most Significant Bit


436 PHY

Physical Layer


437 PLL

Phase-Locked Loop


438 PPI

PHY-Protocol Interface


439 RF

Radio Frequency


440 RX

Receiver


441 SE

Single-Ended


442 SoT

Start of Transmission


443 TLIS

Transmission-Line Interconnect Structure: physical interconnect realization between Master and Slave 

 

445 TX

Transmitter


446 UI

Unit Interval, equal to the duration of any HS state on the Clock Lane

 

MIPI D-PHY 简写收集