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FPGA PS2协议

VerilogHDL那些事儿_建模篇(黑金FPGA开发板配套教程)

作者:akuei2

说明:参照该书将部分程序验证学习一遍

学习时间:201453

 

主要收获:

1. PS2接口有初步了解;

2. 编码键盘和非编码键盘;

3. 通码和断码。

 

PS2相关知识:

1. PS2接口

2. PS2协议对数据的读取,是"下降沿有效"。数据总共有11位,起始位(1)、数据位(8)、奇偶校验位(1)和停止位(1)。

3. 编码键盘与非编码键盘

编码键盘本身带有实现接口主要功能所需的硬件电路,不仅能自动栓测被按下的键并完成去抖动防串键等功能,而且能提供与被按键功能对应的键码(如ASCⅡ码)送往CPU非编码键盘只简单的提供按键开关的行列矩阵,有关键的识别,键码的输入与确定,以及去抖动等功能场由软件完成。

4. 通码和断码

    ①通码:按下某按键;

    ②断码:释放某按键。

当按下按键"A"的时候,就会每秒产生大约10个通码"0X1C";在释放的时候,就会产生断码"0XF0 0X1C"

5. RTL原理图

6. 电平检测模块detect_modulePS2解码模块ps2_detect_module

电平检测模块detect_module

module detect_module

(

CLK, RSTn,

     PS2_CLK_Pin_In,

     H2L_Sig

);

 

input CLK;

     input RSTn;

     input PS2_CLK_Pin_In;

     output H2L_Sig;

      

     /**************************/

      

     reg H2L_F1;

     reg H2L_F2;

    

     always @ ( posedge CLK or negedge RSTn )

     if( !RSTn )

         begin

             H2L_F1 <= 1‘b1;

                     H2L_F2 <= 1‘b1;

         end    

         else

         begin

                 H2L_F1 <= PS2_CLK_Pin_In;

                     H2L_F2 <= H2L_F1;

                end

                

     /****************************/

      

     assign H2L_Sig = H2L_F2 & !H2L_F1;

      

     /****************************/

    

 

endmodule

 

PS2解码模块ps2_detect_module

module ps2_decode_module

(

CLK, RSTn,

     H2L_Sig, PS2_Data_Pin_In,

     PS2_Data, PS2_Done_Sig

);

 

input CLK;

     input RSTn;

     input H2L_Sig;

     input PS2_Data_Pin_In;

     output [7:0]PS2_Data;

     output PS2_Done_Sig;

      

     /*******************************/

      

     reg [7:0]rData;

     reg [4:0]i;

     reg isShift;

     reg isDone;

      

    

     always @ ( posedge CLK or negedge RSTn )

     if( !RSTn )

         begin

                 rData <= 8‘d0;

                     i <= 5‘d0;

                     isDone <= 1‘b0;

                end

         else

             case( i )

                

                 5‘d0:

                     if( H2L_Sig ) i <= i + 1‘b1;

                    

                     4‘d1, 4‘d2, 4‘d3, 4‘d4, 4‘d5, 4‘d6, 4‘d7, 4‘d8:

                     if( H2L_Sig ) begin i <= i + 1‘b1; rData[ i-1 ] <= PS2_Data_Pin_In; end

                    

                     5‘d9, 5‘d10:

                     if( H2L_Sig ) i <= i + 1‘b1;

                

                     5‘d11:

                     if( rData =http://www.mamicode.com/= 8‘hf0 ) i <= 5‘d12;

                     else i <= 5‘d23;

                    

                     5‘d12, 5‘d13, 5‘d14, 5‘d15, 5‘d16, 5‘d17, 5‘d18, 5‘d19, 5‘d20, 5‘d21, 5‘d22:

                     if( H2L_Sig ) i <= i + 1‘b1;

 

                     5‘d23:

                     begin i <= i + 1‘b1; isDone <= 1‘b1; end

                    

                     5‘d24:

                     begin i <= 5‘d0; isDone <= 1‘b0; end

                    

                 endcase

                

/************************************/

      

     assign PS2_Data = http://www.mamicode.com/rData;

     assign PS2_Done_Sig = isDone;

      

     /*************************************/

 

endmodule