In a multicore environment—where system resources must be shared—it is important to control simultaneous accesses to the available resources. To ensure correct system operation, it is necessary to limit access to a resource by one—and only one—core at a time; that is, it is necessary to provide mutual exclusion for resources shared across multiple cores.

TI C66x DSP device contains an enhanced Semaphore module(硬件信号量模块) for the management ofshared resources of the CorePacs. The semaphore2 module is accessible across all the cores on a multicore DSP.Theemaphore enforces atomic accesses toshared chip-level resources so that the read-modify-write sequenceis not broken.The Semaphore block has unique interrupts to each of the CorePacs to identify when that CorePac hasacquired the resource.Semaphore resources within the module are not tied to specific hardware resources. It is a software requirement toallocate semaphore resources to the hardware resource(s) to be arbitrated.The Semaphore module supports 3 masters and contains 32 semaphores to be used within the system.

There are two methods of accessing a semaphore resource:

? Direct Access:A CorePac directly accesses a semaphore resource. If free, the semaphore will be granted. If not,the semaphore is not granted.

? Indirect Access:A CorePac indirectly accesses a semaphore resource by writing it. Once it is free, an interruptnotifies the CPU that it is available.

The Semaphore2 module supports the following features:

? Provides mutual exclusion for a shared resource

? A maximum of 64 independent semaphores

? Semaphore request methods

    – Direct request

    – Indirect request

    – Combined request

? Endian independent

? Atomic semaphore access

? Lock-out mechanism for used semaphores

? Queued requests for used semaphores

? Semaphores access grant interrupt for queued requests

? Allows the application to check the status of any of the 64 semaphores

? Error detection and interrupts