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TI C66x DSP 系统events及其应用 - 5.3(Interrupt)

对于TI C66x DSP的每个CPU有INT4~15共12个中断输入。对于中断,event combiner将INTC的输入event 4~127分为4个组(event 0~3为INTC内部使用,如图示为event combiner的四个输出),然后event 0~127作为Interrupt Selector的输入。类似于4.x中的exception,中断也有同样功能的event flag,event mask,masked event flag寄存器。

Interrupt Seclctor(exception没有类似模块,见下图):

The interrupt selector contains interrupt multiplexing registers, INTMUX[3:1] that allow you to program the source for each of the 12 available DSP interrupts. Each of the events that are presented to the interrupt selector has an event number that is used to program these registers.The order of the DSP interrupts (DSPINT4 through DSPINT15) determines the priority for pending interrupts. Since any interrupt service routine can be atomic (not nestable), the DSP interrupt priority only applies to pending interrupts.