1 /**  2   ******************************************************************************  3   * @file    system_stm32f4xx.c  4   * @author  MCD Application Team  5   * @version V1.4.0  6   * @date    04-August-2014  7   * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.  8   *          This file contains the system clock configuration for STM32F4xx devices.  9   *              10   * 1.  This file provides two functions and one global variable to be called from  11   *     user application: 12   *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier 13   *                      and Divider factors, AHB/APBx prescalers and Flash settings), 14   *                      depending on the configuration made in the clock xls tool.  15   *                      This function is called at startup just after reset and  16   *                      before branch to main program. This call is made inside 17   *                      the "startup_stm32f4xx.s" file. 18   * 19   *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used 20   *                                  by the user application to setup the SysTick  21   *                                  timer or configure other parameters. 22   *                                      23   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must 24   *                                 be called whenever the core clock is changed 25   *                                 during program execution. 26   * 27   * 2. After each device reset the HSI (16 MHz) is used as system clock source. 28   *    Then SystemInit() function is called, in "startup_stm32f4xx.s" file, to 29   *    configure the system clock before to branch to main program. 30   * 31   * 3. If the system clock source selected by user fails to startup, the SystemInit() 32   *    function will do nothing and HSI still used as system clock source. User can  33   *    add some code to deal with this issue inside the SetSysClock() function. 34   * 35   * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define 36   *    in "stm32f4xx.h" file. When HSE is used as system clock source, directly or 37   *    through PLL, and you are using different crystal you have to adapt the HSE 38   *    value to your own configuration. 39   * 40   * 5. This file configures the system clock as follows: 41   *============================================================================= 42   *============================================================================= 43   *                    Supported STM32F40xxx/41xxx devices 44   *----------------------------------------------------------------------------- 45   *        System Clock source                    | PLL (HSE) 46   *----------------------------------------------------------------------------- 47   *        SYSCLK(Hz)                             | 168000000 48   *----------------------------------------------------------------------------- 49   *        HCLK(Hz)                               | 168000000 50   *----------------------------------------------------------------------------- 51   *        AHB Prescaler                          | 1 52   *----------------------------------------------------------------------------- 53   *        APB1 Prescaler                         | 4 54   *----------------------------------------------------------------------------- 55   *        APB2 Prescaler                         | 2 56   *----------------------------------------------------------------------------- 57   *        HSE Frequency(Hz)                      | 25000000 58   *----------------------------------------------------------------------------- 59   *        PLL_M                                  | 25 60   *----------------------------------------------------------------------------- 61   *        PLL_N                                  | 336 62   *----------------------------------------------------------------------------- 63   *        PLL_P                                  | 2 64   *----------------------------------------------------------------------------- 65   *        PLL_Q                                  | 7 66   *----------------------------------------------------------------------------- 67   *        PLLI2S_N                               | NA 68   *----------------------------------------------------------------------------- 69   *        PLLI2S_R                               | NA 70   *----------------------------------------------------------------------------- 71   *        I2S input clock                        | NA 72   *----------------------------------------------------------------------------- 73   *        VDD(V)                                 | 3.3 74   *----------------------------------------------------------------------------- 75   *        Main regulator output voltage          | Scale1 mode 76   *----------------------------------------------------------------------------- 77   *        Flash Latency(WS)                      | 5 78   *----------------------------------------------------------------------------- 79   *        Prefetch Buffer                        | ON 80   *----------------------------------------------------------------------------- 81   *        Instruction cache                      | ON 82   *----------------------------------------------------------------------------- 83   *        Data cache                             | ON 84   *----------------------------------------------------------------------------- 85   *        Require 48MHz for USB OTG FS,          | Disabled 86   *        SDIO and RNG clock                     | 87   *----------------------------------------------------------------------------- 88   *============================================================================= 89   *============================================================================= 90   *                    Supported STM32F42xxx/43xxx devices 91   *----------------------------------------------------------------------------- 92   *        System Clock source                    | PLL (HSE) 93   *----------------------------------------------------------------------------- 94   *        SYSCLK(Hz)                             | 180000000 95   *----------------------------------------------------------------------------- 96   *        HCLK(Hz)                               | 180000000 97   *----------------------------------------------------------------------------- 98   *        AHB Prescaler                          | 1 99   *-----------------------------------------------------------------------------100   *        APB1 Prescaler                         | 4101   *-----------------------------------------------------------------------------102   *        APB2 Prescaler                         | 2103   *-----------------------------------------------------------------------------104   *        HSE Frequency(Hz)                      | 25000000105   *-----------------------------------------------------------------------------106   *        PLL_M                                  | 25107   *-----------------------------------------------------------------------------108   *        PLL_N                                  | 360109   *-----------------------------------------------------------------------------110   *        PLL_P                                  | 2111   *-----------------------------------------------------------------------------112   *        PLL_Q                                  | 7113   *-----------------------------------------------------------------------------114   *        PLLI2S_N                               | NA115   *-----------------------------------------------------------------------------116   *        PLLI2S_R                               | NA117   *-----------------------------------------------------------------------------118   *        I2S input clock                        | NA119   *-----------------------------------------------------------------------------120   *        VDD(V)                                 | 3.3121   *-----------------------------------------------------------------------------122   *        Main regulator output voltage          | Scale1 mode123   *-----------------------------------------------------------------------------124   *        Flash Latency(WS)                      | 5125   *-----------------------------------------------------------------------------126   *        Prefetch Buffer                        | ON127   *-----------------------------------------------------------------------------128   *        Instruction cache                      | ON129   *-----------------------------------------------------------------------------130   *        Data cache                             | ON131   *-----------------------------------------------------------------------------132   *        Require 48MHz for USB OTG FS,          | Disabled133   *        SDIO and RNG clock                     |134   *-----------------------------------------------------------------------------135   *=============================================================================136   *=============================================================================137   *                         Supported STM32F401xx devices138   *-----------------------------------------------------------------------------139   *        System Clock source                    | PLL (HSE)140   *-----------------------------------------------------------------------------141   *        SYSCLK(Hz)                             | 84000000142   *-----------------------------------------------------------------------------143   *        HCLK(Hz)                               | 84000000144   *-----------------------------------------------------------------------------145   *        AHB Prescaler                          | 1146   *-----------------------------------------------------------------------------147   *        APB1 Prescaler                         | 2148   *-----------------------------------------------------------------------------149   *        APB2 Prescaler                         | 1150   *-----------------------------------------------------------------------------151   *        HSE Frequency(Hz)                      | 25000000152   *-----------------------------------------------------------------------------153   *        PLL_M                                  | 25154   *-----------------------------------------------------------------------------155   *        PLL_N                                  | 336156   *-----------------------------------------------------------------------------157   *        PLL_P                                  | 4158   *-----------------------------------------------------------------------------159   *        PLL_Q                                  | 7160   *-----------------------------------------------------------------------------161   *        PLLI2S_N                               | NA162   *-----------------------------------------------------------------------------163   *        PLLI2S_R                               | NA164   *-----------------------------------------------------------------------------165   *        I2S input clock                        | NA166   *-----------------------------------------------------------------------------167   *        VDD(V)                                 | 3.3168   *-----------------------------------------------------------------------------169   *        Main regulator output voltage          | Scale1 mode170   *-----------------------------------------------------------------------------171   *        Flash Latency(WS)                      | 2172   *-----------------------------------------------------------------------------173   *        Prefetch Buffer                        | ON174   *-----------------------------------------------------------------------------175   *        Instruction cache                      | ON176   *-----------------------------------------------------------------------------177   *        Data cache                             | ON178   *-----------------------------------------------------------------------------179   *        Require 48MHz for USB OTG FS,          | Disabled180   *        SDIO and RNG clock                     |181   *-----------------------------------------------------------------------------182   *=============================================================================183   *=============================================================================184   *                         Supported STM32F411xx devices185   *-----------------------------------------------------------------------------186   *        System Clock source                    | PLL (HSI)187   *-----------------------------------------------------------------------------188   *        SYSCLK(Hz)                             | 100000000189   *-----------------------------------------------------------------------------190   *        HCLK(Hz)                               | 100000000191   *-----------------------------------------------------------------------------192   *        AHB Prescaler                          | 1193   *-----------------------------------------------------------------------------194   *        APB1 Prescaler                         | 2195   *-----------------------------------------------------------------------------196   *        APB2 Prescaler                         | 1197   *-----------------------------------------------------------------------------198   *        HSI Frequency(Hz)                      | 16000000199   *-----------------------------------------------------------------------------200   *        PLL_M                                  | 16201   *-----------------------------------------------------------------------------202   *        PLL_N                                  | 400203   *-----------------------------------------------------------------------------204   *        PLL_P                                  | 4205   *-----------------------------------------------------------------------------206   *        PLL_Q                                  | 7207   *-----------------------------------------------------------------------------208   *        PLLI2S_N                               | NA209   *-----------------------------------------------------------------------------210   *        PLLI2S_R                               | NA211   *-----------------------------------------------------------------------------212   *        I2S input clock                        | NA213   *-----------------------------------------------------------------------------214   *        VDD(V)                                 | 3.3215   *-----------------------------------------------------------------------------216   *        Main regulator output voltage          | Scale1 mode217   *-----------------------------------------------------------------------------218   *        Flash Latency(WS)                      | 3219   *-----------------------------------------------------------------------------220   *        Prefetch Buffer                        | ON221   *-----------------------------------------------------------------------------222   *        Instruction cache                      | ON223   *-----------------------------------------------------------------------------224   *        Data cache                             | ON225   *-----------------------------------------------------------------------------226   *        Require 48MHz for USB OTG FS,          | Disabled227   *        SDIO and RNG clock                     |228   *-----------------------------------------------------------------------------229   *=============================================================================230   ******************************************************************************231   * @attention232   *233   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>234   *235   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");236   * You may not use this file except in compliance with the License.237   * You may obtain a copy of the License at:238   *239   *        http://www.st.com/software_license_agreement_liberty_v2240   *241   * Unless required by applicable law or agreed to in writing, software 242   * distributed under the License is distributed on an "AS IS" BASIS, 243   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.244   * See the License for the specific language governing permissions and245   * limitations under the License.246   *